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» A Comparison of Two Architectural Power Models
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TVLSI
2010
15 years 1 months ago
A Low-Power DSP for Wireless Communications
This paper proposes a low-power high-throughput digital signal processor (DSP) for baseband processing in wireless terminals. It builds on our earlier architecture--Signal processi...
Hyunseok Lee, Chaitali Chakrabarti, Trevor N. Mudg...
WWW
2008
ACM
16 years 7 months ago
Restful web services vs. "big"' web services: making the right architectural decision
Recent technology trends in the Web Services (WS) domain indicate that a solution eliminating the presumed complexity of the WS-* standards may be in sight: advocates of REpresent...
Cesare Pautasso, Olaf Zimmermann, Frank Leymann
DDECS
2009
IEEE
146views Hardware» more  DDECS 2009»
15 years 10 months ago
Enhanced LEON3 core for superscalar processing
Low power consumption and high-performance are two main directions in the development of modern microprocessor architectures. In general they are two excluding branches of System-o...
Krzysztof Marcinek, Arkadiusz W. Luczyk, Witold A....
ASPDAC
1998
ACM
160views Hardware» more  ASPDAC 1998»
15 years 10 months ago
Synthesis of Power Efficient Systems-on-Silicon
We developed a new modular synthesis approach for design of low-power core-based data-intensive application-specific systems on silicon. The power optimization is conducted in th...
Darko Kirovski, Chunho Lee, Miodrag Potkonjak, Wil...
MSWIM
2009
ACM
16 years 1 months ago
HUBCODE: message forwarding using hub-based network coding in delay tolerant networks
Most people-centric delay tolerant networks have been shown to exhibit power-law behavior. Analysis of the temporal connectivity graph of such networks reveals the existence of hu...
Shabbir Ahmed, Salil S. Kanhere