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DATE
2009
IEEE
79views Hardware» more  DATE 2009»
16 years 2 months ago
Solver technology for system-level to RTL equivalence checking
—Checking the equivalence of a system-level model against an RTL design is a major challenge. The reason is that usually the system-level model is written by a system architect, ...
Alfred Kölbl, Reily Jacoby, Himanshu Jain, Ca...
ICPR
2008
IEEE
16 years 8 months ago
White-space models for offline Arabic handwriting recognition
We propose to explicitly model white-spaces for Arabic handwriting recognition within different writing variants. Position-dependent character shapes in Arabic handwriting allow f...
Philippe Dreuw, Stephan Jonas, Hermann Ney
EMNLP
2008
15 years 8 months ago
Maximum Entropy based Rule Selection Model for Syntax-based Statistical Machine Translation
This paper proposes a novel maximum entropy based rule selection (MERS) model for syntax-based statistical machine translation (SMT). The MERS model combines local contextual info...
Qun Liu, Zhongjun He, Yang Liu, Shouxun Lin
KIVS
2005
Springer
16 years 22 days ago
An Integrated Simulator for Inter-Domain Scenarios
Abstract. The simulation of large-scale inter-domain networks is useful for various aspects of network planning and management. It is also a challenge due to its scalability proble...
Matthias Scheidegger, Florian Baumgartner, Torsten...
MICRO
2010
IEEE
173views Hardware» more  MICRO 2010»
15 years 5 months ago
Single-Chip Heterogeneous Computing: Does the Future Include Custom Logic, FPGAs, and GPGPUs?
To extend the exponential performance scaling of future chip multiprocessors, improving energy efficiency has become a first-class priority. Single-chip heterogeneous computing ha...
Eric S. Chung, Peter A. Milder, James C. Hoe, Ken ...