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» A Framework for Scheduler Synthesis
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RTSS
2006
IEEE
16 years 27 days ago
Run-Time Services for Hybrid CPU/FPGA Systems on Chip
Modern FPGA devices, which include (multiple) processor core(s) as diffused IP on the silicon die, provide an excellent platform for developing custom multiprocessor systems-on-pr...
Jason Agron, Wesley Peck, Erik Anderson, David L. ...
CASES
2004
ACM
16 years 9 days ago
Safely exploiting multithreaded processors to tolerate memory latency in real-time systems
A coarse-grain multithreaded processor can effectively hide long memory latencies by quickly switching to an alternate task when the active task issues a memory request, improving...
Ali El-Haj-Mahmoud, Eric Rotenberg
IPPS
2005
IEEE
16 years 14 days ago
Fault-Tolerant Parallel Applications with Dynamic Parallel Schedules
Commodity computer clusters are often composed of hundreds of computing nodes. These generally off-the-shelf systems are not designed for high reliability. Node failures therefore...
Sebastian Gerlach, Roger D. Hersch
UAIS
2010
15 years 1 months ago
Auditory universal accessibility of data tables using naturally derived prosody specification
Abstract Text documents usually embody visually oriented meta-information in the form of complex visual structures, such as tables. The semantics involved in such objects result in...
Dimitris Spiliotopoulos, Gerasimos Xydas, Georgios...
FMOODS
2003
15 years 8 months ago
A Rewriting Based Model for Probabilistic Distributed Object Systems
Concurrent and distributed systems have traditionally been modelled using nondeterministic transitions over configurations. The minism provides an abstraction over scheduling, net...
Nirman Kumar, Koushik Sen, José Meseguer, G...