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VMCAI
2009
Springer
16 years 2 months ago
Thread-Modular Shape Analysis
We present the first shape analysis for multithreaded programs that avoids the explicit enumeration of execution-interleavings. Our approach is to automatically infer a resource ...
Alexey Gotsman, Josh Berdine, Byron Cook, Mooly Sa...
DATE
2009
IEEE
86views Hardware» more  DATE 2009»
16 years 2 months ago
A formal approach to design space exploration of protocol converters
In the field of chip design, hardware module reuse is a standard solution to the increasing complexity of chip architecture and the pressures to reduce time to market. In the abs...
Karin Avnit, Arcot Sowmya
DATE
2009
IEEE
87views Hardware» more  DATE 2009»
16 years 2 months ago
Multi-clock Soc design using protocol conversion
The automated design of SoCs from pre-selected IPs that may require different clocks is challenging because of the following issues. Firstly, protocol mismatches between IPs need ...
Roopak Sinha, Partha S. Roop, Samik Basu, Zoran Sa...
183
Voted
FCCM
2009
IEEE
172views VLSI» more  FCCM 2009»
16 years 2 months ago
Evaluation of Static Analysis Techniques for Fixed-Point Precision Optimization
Abstract—Precision analysis and optimization is very important when transforming a floating-point algorithm into fixedpoint hardware implementations. The core analysis techniqu...
Jason Cong, Karthik Gururaj, Bin Liu, Chunyue Liu,...
GLVLSI
2009
IEEE
150views VLSI» more  GLVLSI 2009»
16 years 2 months ago
Contradictory antecedent debugging in bounded model checking
In the context of formal verification Bounded Model Checking (BMC) has shown to be very powerful for large industrial designs. BMC is used to check whether a circuit satisfies a...
Daniel Große, Robert Wille, Ulrich Kühn...
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