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» A Linear Logical Framework
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240
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FPGA
2009
ACM
168views FPGA» more  FPGA 2009»
15 years 5 months ago
Large-scale wire-speed packet classification on FPGAs
Multi-field packet classification is a key enabling function of a variety of network applications, such as firewall processing, Quality of Service differentiation, traffic billing...
Weirong Jiang, Viktor K. Prasanna
159
Voted
TCAD
2010
130views more  TCAD 2010»
15 years 2 months ago
On ATPG for Multiple Aggressor Crosstalk Faults
Crosstalk faults have emerged as a significant mechanism for circuit failure. Long signal nets are of particular concern because they tend to have a higher coupling capacitance to...
Kunal P. Ganeshpure, Sandip Kundu
CADE
2005
Springer
16 years 7 months ago
A Combination Method for Generating Interpolants
We present a combination method for generating interpolants for a class of first-order theories. Using interpolant-generation procedures for individual theories as black-boxes, our...
Greta Yorsh, Madanlal Musuvathi
206
Voted
ICCD
2004
IEEE
105views Hardware» more  ICCD 2004»
16 years 4 months ago
Circuit-Based Preprocessing of ILP and Its Applications in Leakage Minimization and Power Estimation
In this paper we discuss the application of circuit-based logical reasoning to simplify optimization problems expressed as integer linear programs (ILP) over circuit states. We de...
Donald Chai, Andreas Kuehlmann
156
Voted
ICCAD
2007
IEEE
113views Hardware» more  ICCAD 2007»
16 years 4 months ago
Combinational and sequential mapping with priority cuts
An algorithm for technology mapping of combinational and sequential logic networks is proposed and applied to mapping into K-input lookup-tables (K-LUTs). The new algorithm avoids...
Alan Mishchenko, Sungmin Cho, Satrajit Chatterjee,...