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CASES
2010
ACM
15 years 5 months ago
Improved procedure placement for set associative caches
The performance of most embedded systems is critically dependent on the memory hierarchy performance. In particular, higher cache hit rate can provide significant performance boos...
Yun Liang, Tulika Mitra
MICRO
2010
IEEE
172views Hardware» more  MICRO 2010»
15 years 5 months ago
Architectural Support for Fair Reader-Writer Locking
Abstract--Many shared-memory parallel systems use lockbased synchronization mechanisms to provide mutual exclusion or reader-writer access to memory locations. Software locks are i...
Enrique Vallejo, Ramón Beivide, Adriá...
UIST
2010
ACM
15 years 5 months ago
Multitoe: high-precision interaction with back-projected floors based on high-resolution multi-touch input
Tabletop applications cannot display more than a few dozen on-screen objects. The reason is their limited size: tables cannot become larger than arm's length without giving u...
Thomas Augsten, Konstantin Kaefer, René Meu...
UIST
2010
ACM
15 years 5 months ago
VizWiz: nearly real-time answers to visual questions
Visual information pervades our environment. Vision is used to de cide everything from what we want to eat at a restaurant and which bus route to take to whether our clothes match...
Jeffrey P. Bigham, Chandrika Jayant, Hanjie Ji, Gr...
ICFEM
2009
Springer
15 years 5 months ago
Graded-CTL: Satisfiability and Symbolic Model Checking
In this paper we continue the study of a strict extension of the Computation Tree Logic, called graded-CTL, recently introduced by the same authors. This new logic augments the sta...
Alessandro Ferrante, Margherita Napoli, Mimmo Pare...
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