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184
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LCTRTS
2007
Springer
16 years 15 days ago
Integrated CPU and l2 cache voltage scaling using machine learning
Embedded systems serve an emerging and diverse set of applications. As a result, more computational and storage capabilities are added to accommodate ever more demanding applicati...
Nevine AbouGhazaleh, Alexandre Ferreira, Cosmin Ru...
157
Voted
WWW
2010
ACM
16 years 1 months ago
Fast and parallel webpage layout
The web browser is a CPU-intensive program. Especially on mobile devices, webpages load too slowly, expending significant time in processing a document’s appearance. Due to powe...
Leo A. Meyerovich, Rastislav Bodík
171
Voted
MICRO
2009
IEEE
129views Hardware» more  MICRO 2009»
16 years 1 months ago
Execution leases: a hardware-supported mechanism for enforcing strong non-interference
High assurance systems such as those found in aircraft controls and the financial industry are often required to handle a mix of tasks where some are niceties (such as the contro...
Mohit Tiwari, Xun Li, Hassan M. G. Wassel, Frederi...
185
Voted
XSYM
2009
Springer
139views Database» more  XSYM 2009»
16 years 29 days ago
A Data Parallel Algorithm for XML DOM Parsing
Abstract. The extensible markup language XML has become the de facto standard for information representation and interchange on the Internet. XML parsing is a core operation perfor...
Bhavik Shah, Praveen Rao, Bongki Moon, Mohan Rajag...
178
Voted
CLUSTER
2007
IEEE
16 years 21 days ago
Balancing productivity and performance on the cell broadband engine
— The Cell Broadband Engine (BE) is a heterogeneous multicore processor, combining a general-purpose POWER architecture core with eight independent single-instructionmultiple-dat...
Sadaf R. Alam, Jeremy S. Meredith, Jeffrey S. Vett...