7167 search results - page 282 / 1434 » A Technique for Invariant Generation |
190
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DATE
2002
IEEE
16 years 12 days ago
2002
IEEE
This paper develops an improved approach for hierarchical functional test generation for complex chips. In order to deal with the increasing complexity of functional test generati...
222
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DAC
1999
ACM
15 years 11 months ago
1999
ACM
As the sizes of general and special purpose processors increase rapidly, generating high quality manufacturing tests which can be run at native speeds is becoming a serious proble...
150
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ITICSE
1999
ACM
15 years 11 months ago
1999
ACM
This paper shows how a multimedia multi-framed simulation generator was developed. A technique of recording a sequence of steps and playing them back as an animation overcomes the...
223
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CODES
2006
IEEE
15 years 11 months ago
2006
IEEE
During System on Chip (SoC) design, Network on Chip (NoC) prototyping is used for adapting NoC parameters to the application running on the chip. This prototyping is currently don...
181
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ITC
1995
IEEE
15 years 11 months ago
1995
IEEE
During built-in self-test (BIST), the set of patterns generated by a pseudo-random pattern generator may not provide a sufficiently high fault coverage. This paper presents a new ...