2407 search results - page 158 / 482 » A Tool for Abstraction in Model Checking |
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FPL
2004
Springer
16 years 11 days ago
2004
Springer
Abstract. High level modeling tools make it possible to synthesize a high performance FPGA design directly from a Simulink model. Accurate estimates of the FPGA resources required ...
161
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CAV
2010
Springer
15 years 11 months ago
2010
Springer
We present the algorithms used in MCVETO (Machine-Code VErification TOol), a tool to check whether a stripped machinecode program satisfies a safety property. The verification p...
246
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CAV
2008
Springer
15 years 9 months ago
2008
Springer
Abstract. The use of Craig interpolants has enabled the development of powerful hardware and software model checking techniques. Efficient algorithms are known for computing interp...
194
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ACSC
2007
IEEE
15 years 11 months ago
2007
IEEE
Security protocols are often specified at the application layer; however, application layer specifications give little detail regarding message data structures at the presentation...
202
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FDL
2006
IEEE
16 years 1 months ago
2006
IEEE
Reusing IP-cores to construct system models facilitated by automated generation of glue-logic, and automated composability checks can help designers to create efficient simulation...