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» A Tool for Abstraction in Model Checking
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SOFTVIS
2010
ACM
15 years 7 months ago
TIE: an interactive visualization of thread interleavings
Multi-core processors have become increasingly prevalent, driving a software shift toward concurrent programs which best utilize these processors. Testing and debugging concurrent...
Gowritharan Maheswara, Jeremy S. Bradbury, Christo...
FMICS
2006
Springer
15 years 10 months ago
Model-Based Testing of a WAP Gateway: An Industrial Case-Study
Abstract. We present experiences from a case study where a model-based approach to black-box testing is applied to verify that a Wireless Application Protocol (WAP) gateway conform...
Anders Hessel, Paul Pettersson
CAV
2007
Springer
104views Hardware» more  CAV 2007»
16 years 1 months ago
Revamping TVLA: Making Parametric Shape Analysis Competitive
Abstract. TVLA is a parametric framework for shape analysis that can be easily instantiated to create different kinds of analyzers for checking properties of programs that use link...
Igor Bogudlov, Tal Lev-Ami, Thomas W. Reps, Mooly ...
202
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DSD
2004
IEEE
129views Hardware» more  DSD 2004»
15 years 10 months ago
Functional Validation of Programmable Architectures
Validation of programmable architectures, consisting of processor cores, coprocessors, and memory subsystems, is one of the major bottlenecks in current Systemon-Chip design metho...
Prabhat Mishra, Nikil D. Dutt
ICPP
1994
IEEE
15 years 11 months ago
Cachier: A Tool for Automatically Inserting CICO Annotations
Shared memory in a parallel computer provides prowith the valuable abstraction of a shared address space--through which any part of a computation can access any datum. Although un...
Trishul M. Chilimbi, James R. Larus