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HPCA
2002
IEEE
16 years 8 months ago
Loose Loops Sink Chips
This paper explores the concept of micro-architectural loops and discusses their impact on processor pipelines. In particular, we establish the relationship between loose loops an...
Eric Borch, Eric Tune, Srilatha Manne, Joel S. Eme...
PERCOM
2006
ACM
16 years 7 months ago
CAPS: Energy-Efficient Processing of Continuous Aggregate Queries in Sensor Networks
In this paper, we design and evaluate an energy efficient data retrieval architecture for continuous aggregate queries in wireless sensor networks. We show how the modification of...
Wen Hu, Archan Misra, Rajeev Shorey
DAC
2009
ACM
16 years 2 months ago
Yield-driven iterative robust circuit optimization algorithm
This paper proposes an equation-based multi-scenario iterative robust optimization methodology for analog/mixed-signal circuits. We show that due to local circuit performance mono...
Yan Li, Vladimir Stojanovic
DATE
2009
IEEE
136views Hardware» more  DATE 2009»
16 years 2 months ago
A novel approach to entirely integrate Virtual Test into test development flow
– In this paper, we present an open architecture Virtual Test Environment (VTE) which can be easily integrated into various modularized Automatic Test Systems (ATS) compliant to ...
Ping Lu, Daniel Glaser, Gürkan Uygur, Klaus H...
193
Voted
DATE
2009
IEEE
101views Hardware» more  DATE 2009»
16 years 2 months ago
A monitor interconnect and support subsystem for multicore processors
Abstract— In many current SoCs, the architectural interface to onchip monitors is ad hoc and inefficient. In this paper, a new architectural approach which advocates the use of a...
Sailaja Madduri, Ramakrishna Vadlamani, Wayne Burl...