3 search results - page 1 / 1 » A VLSI Design Flow for Secure Side-Channel Attack Resistant ... |
166
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CHES
2006
Springer
15 years 10 months ago
2006
Springer
Balanced dynamic dual-rail gates and asynchronous circuits have been shown, if implemented correctly, to have natural and efficient resistance to side-channel attacks. Despite thei...
172
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GLVLSI
2007
IEEE
16 years 20 days ago
2007
IEEE
In this paper, we propose a new design methodology to assess the risk for side-channel attacks, more specifically timing analysis and simple power analysis, at an early design st...