1008 search results - page 196 / 202 » A cis-regulatory logic simulator |
169
Voted
MTDT
2003
IEEE
15 years 12 months ago
2003
IEEE
Advances in System-on-Chip (SoC) technology rely on manufacturing and assembling high-performance system cores for many critical applications. Among these cores, memory occupies t...
219
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FPGA
2003
ACM
15 years 12 months ago
2003
ACM
This paper presents a new power saving, high speed FPGA design enhancing a previous SiGe CML FPGA based on the Xilinx 6200 FPGA. The design aims at having a higher performance but...
194
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CF
2010
ACM
15 years 11 months ago
2010
ACM
We develop two simple interval-based models for dynamic superscalar processors. These models allow us to: i) predict with great accuracy performance and power consumption under va...
192
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CF
2010
ACM
15 years 11 months ago
2010
ACM
Per-core local (scratchpad) memories allow direct inter-core communication, with latency and energy advantages over coherent cache-based communication, especially as CMP architect...
199
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FCCM
2002
IEEE
15 years 11 months ago
2002
IEEE
The paper presents a Design Space Exploration (DSE) experiment which has been carried out in order to determine the optimum FPGA–based Variable-Length Decoder (VLD) computing re...