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TCAD
2002
104views more  TCAD 2002»
15 years 6 months ago
An instruction-level energy model for embedded VLIW architectures
In this paper, an instruction-level energy model is proposed for the data-path of very long instruction word (VLIW) pipelined processors that can be used to provide accurate power ...
Mariagiovanna Sami, Donatella Sciuto, Cristina Sil...
ICCD
2007
IEEE
121views Hardware» more  ICCD 2007»
16 years 4 months ago
Fast power network analysis with multiple clock domains
This paper proposes an efficient analysis flow and an algorithm to identify the worst case noise for power networks with multiple clock domains. First, we apply the Laplace transf...
Wanping Zhang, Ling Zhang, Rui Shi, He Peng, Zhi Z...
ISLPED
2009
ACM
168views Hardware» more  ISLPED 2009»
16 years 1 months ago
Low power circuit design based on heterojunction tunneling transistors (HETTs)
The theoretical lower limit of subthreshold swing in MOSFETs (60 mV/decade) significantly restricts low voltage operation since it results in a low ON to OFF current ratio at low ...
Daeyeon Kim, Yoonmyung Lee, Jin Cai, Isaac Lauer, ...
ICC
2007
IEEE
178views Communications» more  ICC 2007»
16 years 1 months ago
Impact of Transmission Power on the Performance of UDP in Vehicular Ad Hoc Networks
—With the availability of cheap and robust wireless devices there is demand for new applications in Vehicular Ad-hoc Networks (VANET). The challenge in implementing applications ...
Behrooz Khorashadi, Andrew Chen, Dipak Ghosal, Che...
EMSOFT
2008
Springer
15 years 8 months ago
On the interplay of dynamic voltage scaling and dynamic power management in real-time embedded applications
Dynamic Voltage Scaling (DVS) and Dynamic Power Management (DPM) are two popular techniques commonly employed to save energy in real-time embedded systems. DVS policies aim at red...
Vinay Devadas, Hakan Aydin