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RSP
2005
IEEE
155views Control Systems» more  RSP 2005»
16 years 11 days ago
Optimization Techniques for ADL-Driven RTL Processor Synthesis
Nowadays, Architecture Description Languages (ADLs) are getting popular to speed up the development of complex SoC design, by performing the design space explon a higher level of ...
Oliver Schliebusch, Anupam Chattopadhyay, Ernst Ma...
DATE
2009
IEEE
138views Hardware» more  DATE 2009»
16 years 1 months ago
Hardware/software co-design architecture for thermal management of chip multiprocessors
—The sustained push for performance, transistor count, and instruction level parallelism has reached a point where chip level power density issues are at the forefront of design ...
Omer Khan, Sandip Kundu
ISHPC
2000
Springer
15 years 10 months ago
Loop Termination Prediction
Deeply pipelined high performance processors require highly accurate branch prediction to drive their instruction fetch. However there remains a class of events which are not easi...
Timothy Sherwood, Brad Calder
POLICY
2007
Springer
16 years 27 days ago
Specifying and Enforcing High-Level Semantic Obligation Policies
Obligation Policies specify management actions that must be performed when a particular kind of event occurs and certain conditions are satisfied. Large scale distributed systems...
Zhen Liu, Anand Ranganathan, Anton Riabov
SOSP
1993
ACM
15 years 8 months ago
The Information Bus - An Architecture for Extensible Distributed Systems
Research can rarely be performed on large-scale, distributed systems at the level of thousands of workstations. In this paper, we describe the motivating constraints, design princ...
Brian M. Oki, Manfred Pflügl, Alex Siegel, Da...