5964 search results - page 225 / 1193 » A theory of speculative computation |
183
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APCSAC
2000
IEEE
15 years 11 months ago
2000
IEEE
This paper briefly reviews the current research into RISC microprocessor architecture, which now seems to be so complex as to make the acronym somewhat of an oxymoron. In response...
219
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HPCA
2000
IEEE
15 years 11 months ago
2000
IEEE
Efficiency of synchronization mechanisms can limit the parallel performance of many shared-memory applications. In addition, the ever increasing performance gap between processor...
198
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EUROPAR
1999
Springer
15 years 11 months ago
1999
Springer
Two-level predictors deliver highly accurate conditional branch prediction, indirect branch target prediction and value prediction. Accurate prediction enables speculative executio...
198
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ICS
1999
Tsinghua U.
15 years 11 months ago
1999
Tsinghua U.
Instruction scheduling is an important compiler technique for exploiting more instruction-level parallelism (ILP) in high-performance microprocessors, and in this paper, we study ...
208
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ICS
1999
Tsinghua U.
15 years 11 months ago
1999
Tsinghua U.
Memory operations remain a significant bottleneck in dynamically scheduled pipelined processors, due in part to the inability to statically determine the existence of memory addr...