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VLSID
1996
IEEE
119views VLSI» more  VLSID 1996»
15 years 11 months ago
Parallel simulated annealing strategies for VLSI cell placement
Simulated annealing based standard cell placement for VLSI designs has long been acknowledged as a compute-intensive process, and as a result several research efforts have been un...
John A. Chandy, Prithviraj Banerjee
ICLP
1997
Springer
15 years 11 months ago
Non-Failure Analysis for Logic Programs
We provide a method whereby, given mode and (upper approximation) type information, we can detect procedures and goals that can be guaranteed to not fail (i.e., to produce at leas...
Saumya K. Debray, Pedro López-García...
PEPM
1997
ACM
15 years 11 months ago
Annotation-Directed Run-Time Specialization in C
We present the design of a dynamic compilation system for C. Directed by a few declarative user annotations specifying where and on what dynamic compilation is to take place, a bi...
Brian Grant, Markus Mock, Matthai Philipose, Craig...
ASPLOS
2008
ACM
15 years 9 months ago
Parallelizing security checks on commodity hardware
Speck1 is a system that accelerates powerful security checks on commodity hardware by executing them in parallel on multiple cores. Speck provides an infrastructure that allows se...
Edmund B. Nightingale, Daniel Peek, Peter M. Chen,...
ISCAPDCS
2001
15 years 8 months ago
Tolerating Transient Faults through an Instruction Reissue Mechanism
In this paper, we propose a fault-tolerant mechanism for microprocessors, which detects transient faults and recovers from them. There are two driving force to investigate fault-t...
Toshinori Sato, Itsujiro Arita