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3DIC
2009
IEEE
263views Hardware» more  3DIC 2009»
15 years 11 months ago
3D optical networks-on-chip (NoC) for multiprocessor systems-on-chip (MPSoC)
Abstract— Networks-on-chip (NoC) is emerging as a key onchip communication architecture for multiprocessor systemson-chip (MPSoC). In traditional electronic NoCs, high bandwidth ...
Yaoyao Ye, Lian Duan, Jiang Xu, Jin Ouyang, Mo Kwa...
ICML
2008
IEEE
16 years 8 months ago
Automatic discovery and transfer of MAXQ hierarchies
We present an algorithm, HI-MAT (Hierarchy Induction via Models And Trajectories), that discovers MAXQ task hierarchies by applying dynamic Bayesian network models to a successful...
Neville Mehta, Soumya Ray, Prasad Tadepalli, Thoma...
RECOMB
2009
Springer
16 years 8 months ago
Evaluating Between-Pathway Models with Expression Data
Abstract. Between-Pathway Models (BPMs) are network motifs consisting of pairs of putative redundant pathways. In this paper, we show how adding another source of high-throughput d...
Benjamin J. Hescott, Mark D. M. Leiserson, Lenore ...
RECOMB
2005
Springer
16 years 7 months ago
The Pathalyzer: A Tool for Analysis of Signal Transduction Pathways
Abstract. The Pathalyzer is a program for analyzing large-scale signal transduction networks. Reactions and their substrates and products are represented as transitions and places ...
David L. Dill, Merrill Knapp, Pamela Gage, Carolyn...
ICALP
2009
Springer
16 years 7 months ago
Towards a Study of Low-Complexity Graphs
Abstract. We propose the study of graphs that are defined by lowcomplexity distributed and deterministic agents. We suggest that this viewpoint may help introduce the element of in...
Sanjeev Arora, David Steurer, Avi Wigderson
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