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ICCAD
1996
IEEE
140views Hardware» more  ICCAD 1996»
15 years 11 months ago
Register-transfer level estimation techniques for switching activity and power consumption
We present techniques for estimating switching activity and power consumption in register-transfer level (RTL) circuits. Previous work on this topic has ignored the presence of gl...
Anand Raghunathan, Sujit Dey, Niraj K. Jha
SRDS
2003
IEEE
16 years 2 days ago
Sharing Memory with Semi-Byzantine Clients and Faulty Storage Servers
This paper presents fault-tolerant simulations of a single-writer multi-reader regular register in storage systems. One simulation tolerates fail-stop failures of storage servers ...
Hagit Attiya, Amir Bar-Or
ANCS
2007
ACM
15 years 10 months ago
Frame shared memory: line-rate networking on commodity hardware
Network processors provide an economical programmable platform to handle the high throughput and frame rates of modern and next-generation communication systems. However, these pl...
John Giacomoni, John K. Bennett, Antonio Carzaniga...
IPSN
2007
Springer
16 years 28 days ago
Harbor: software-based memory protection for sensor nodes
Many sensor nodes contain resource constrained microcontrollers where user level applications, operating system components, and device drivers share a single address space with no...
Ram Kumar, Eddie Kohler, Mani B. Srivastava
APCCAS
2006
IEEE
224views Hardware» more  APCCAS 2006»
15 years 8 months ago
A Multi-Context FPGA Using a Floating-Gate-MOS Functional Pass-Gate and Its CAD Environment
Abstract-- Multi-context FPGAs (MC-FPGAs) have multiple memory bits per configuration bit forming configuration planes for fast switching between contexts. The additional memory pl...
Masanori Hariyama, Michitaka Kameyama