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SIGCSE
1999
ACM
120views Education» more  SIGCSE 1999»
15 years 11 months ago
Visualizing the CPU scheduler and page replacement algorithms
In this paper, we presenttwo packagesthat simulate the multilevel feedbackqueueschedulingalgorithm for a single CPU,andfive pagereplacementalgorithmsthat areusedin the context of ...
Sami Khuri, Hsiu-Chin Hsu
174
Voted
FOCS
1998
IEEE
15 years 11 months ago
Towards an Optimal Bit-Reversal Permutation Program
The speed of many computations is limited not by the number of arithmetic operations but by the time it takes to move and rearrange data in the increasingly complicated memory hie...
Larry Carter, Kang Su Gatlin
PPSN
1998
Springer
15 years 11 months ago
Parallel Evolutionary Optimisation with Constraint Propagation
Abstract. This paper describes a parallel model for a distributed memory architecture of a non traditional evolutionary computation method, which integrates constraint propagation ...
Alvaro Ruiz-Andino, Lourdes Araujo, José J....
HIPC
2004
Springer
16 years 14 days ago
A Shared Memory Dispatching Approach for Partially Clairvoyant Schedulers
It is well known that in a typical real-time system, certain parameters, such as the execution time of a job, are not fixed numbers. In such systems, it is common to characterize ...
K. Subramani, Kiran Yellajyosula
209
Voted
ISCA
2002
IEEE
115views Hardware» more  ISCA 2002»
16 years 13 hour ago
ReVive: Cost-Effective Architectural Support for Rollback Recovery in Shared-Memory Multiprocessors
This paper presents ReVive, a novel general-purpose rollback recovery mechanism for shared-memory multiprocessors. ReVive carefully balances the conflicting requirements of avail...
Milos Prvulovic, Josep Torrellas, Zheng Zhang