Sciweavers

3865 search results - page 228 / 773
» Active memory operations
Sort
View
CONCURRENCY
2002
112views more  CONCURRENCY 2002»
15 years 7 months ago
An analysis of VI Architecture primitives in support of parallel and distributed communication
We present the results of a detailed study of the Virtual Interface (VI) paradigm as a communication foundation for a distributed computing environment. Using Active Messages and ...
Andrew Begel, Philip Buonadonna, David E. Culler, ...
DAC
2004
ACM
16 years 8 months ago
An integrated hardware/software approach for run-time scratchpad management
An ever increasing number of dynamic interactive applications are implemented on portable consumer electronics. Designers depend largely on operating systems to map these applicat...
Francesco Poletti, Paul Marchal, David Atienza, Lu...
VLSID
2007
IEEE
231views VLSI» more  VLSID 2007»
16 years 7 months ago
AHIR: A Hardware Intermediate Representation for Hardware Generation from High-level Programs
We present AHIR, an intermediate representation (IR), that acts as a transition layer between software compilation and hardware synthesis. Such a transition layer is intended to t...
Sameer D. Sahasrabuddhe, Hakim Raja, Kavi Arya, Ma...
ICDE
2007
IEEE
120views Database» more  ICDE 2007»
16 years 1 months ago
Optimizing State-Intensive Non-Blocking Queries Using Run-time Adaptation
Main memory is a critical resource when processing non-blocking queries with state intensive operators that require real-time responses. While partitioned parallel processing can ...
Bin Liu, Mariana Jbantova, Elke A. Rundensteiner
OSDI
1996
ACM
15 years 8 months ago
Online Data-Race Detection via Coherency Guarantees
We present the design and evaluation of an on-thefly data-race-detection technique that handles applications written for the lazy release consistent (LRC) shared memory model. We ...
Dejan Perkovic, Peter J. Keleher