3865 search results - page 272 / 773 » Active memory operations |
183
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IEEEPACT
2006
IEEE
16 years 1 months ago
2006
IEEE
Modern out-of-order processors with non-blocking caches exploit Memory-Level Parallelism (MLP) by overlapping cache misses in a wide instruction window. The exploitation of MLP, h...
186
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PLDI
2004
ACM
16 years 21 days ago
2004
ACM
When vectorizing for SIMD architectures that are commonly employed by today’s multimedia extensions, one of the new challenges that arise is the handling of memory alignment. Pr...
225
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VLDB
1999
ACM
15 years 11 months ago
1999
ACM
Recent high-performance processors employ sophisticated techniques to overlap and simultaneously execute multiple computation and memory operations. Intuitively, these techniques ...
268
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HOTOS
2009
IEEE
15 years 11 months ago
2009
IEEE
Smartphones enable a new, rich user experience in pervasive computing, but their hardware is still very limited in terms of computation, memory, and energy reserves, thus limiting...
200
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DGCI
2006
Springer
15 years 11 months ago
2006
Springer
Abstract. Recent advances in graphics hardware provide new possibilities to successfully integrate and improve multiresolution models. In this paper, we present a new continuous mu...