3865 search results - page 297 / 773 » Active memory operations |
242
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ICDCS
1997
IEEE
15 years 11 months ago
1997
IEEE
This paper evaluates the use of per-node multi-threading to hide remote memory and synchronization latencies in a software DSM. As with hardware systems, multi-threading in softwa...
206
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APCSAC
2001
IEEE
15 years 11 months ago
2001
IEEE
In this paper, a new architecture called the extendable instruction set computer (EISC) is introduced that addresses the issues of memory size and performance in embedded micropro...
208
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EUROGP
2000
Springer
15 years 11 months ago
2000
Springer
The use of FPGA based custom computing platforms is proposed for implementing linearly structured Genetic Programs. Such a context enables consideration of micro architectural and ...
240
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TIC
2000
Springer
15 years 11 months ago
2000
Springer
Linear type systems permit programmers to deallocate or explicitly recycle memory, but they are severly restricted by the fact that they admit no aliasing. This paper describes a ...
190
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AAAI
2006
15 years 8 months ago
2006
The scalability of graph-search algorithms can be greatly extended by using external memory, such as disk, to store generated nodes. We consider structured duplicate detection, an...