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ICCD
2008
IEEE
159views Hardware» more  ICCD 2008»
16 years 4 months ago
A high-performance parallel CAVLC encoder on a fine-grained many-core system
—This paper presents a high-performance parallel context-based adaptive length coding (CAVLC) encoder implemented on a fine-grained many-core system. The software encoder is desi...
Zhibin Xiao, Bevan Baas
ICCD
2006
IEEE
115views Hardware» more  ICCD 2006»
16 years 4 months ago
Long-term Performance Bottleneck Analysis and Prediction
— Identifying performance bottlenecks is important for microarchitects and application developers to produce high performance microprocessor designs and application software. Man...
Fei Gao, Suleyman Sair
182
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ICCD
2004
IEEE
126views Hardware» more  ICCD 2004»
16 years 4 months ago
Implementation of Fine-Grained Cache Monitoring for Improved SMT Scheduling
Simultaneous Multithreading (SMT) is emerging as an effective microarchitecture model to increase the utilization of resources in modern super-scalar processors. However, co-sched...
Joshua L. Kihm, Daniel A. Connors
ICCD
2001
IEEE
124views Hardware» more  ICCD 2001»
16 years 4 months ago
High-Level Power Modeling of CPLDs and FPGAs
In this paper, we present a high-level power modeling technique to estimate the power consumption of reconfigurable devices such as complex programmable logic devices (CPLDs) and ...
Li Shang, Niraj K. Jha
ICCAD
2006
IEEE
152views Hardware» more  ICCAD 2006»
16 years 4 months ago
System-wide energy minimization for real-time tasks: lower bound and approximation
We present a dynamic voltage scaling (DVS) technique that minimizes system-wide energy consumption for both periodic and sporadic tasks. It is known that a system consists of proc...
Xiliang Zhong, Cheng-Zhong Xu