Sciweavers

3635 search results - page 436 / 727
» Algorithms for Energy Saving
Sort
View
213
Voted
HOTOS
2003
IEEE
16 years 22 days ago
Privacy-Aware Location Sensor Networks
Advances in sensor networking and location tracking technology enable location-based applications but they also create significant privacy risks. Privacy is typically addressed t...
Marco Gruteser, Graham Schelle, Ashish Jain, Richa...
IPPS
2003
IEEE
16 years 22 days ago
Parallel Detection of Regulatory Elements with gMP
The detection of regulatory elements from a large set of regulatory regions is a challenging problem in computational genomics. However, computational methods to extract this biol...
Bertil Schmidt, Lin Feng, Amey V. Laud, Yusdi Sant...
DATE
2002
IEEE
118views Hardware» more  DATE 2002»
16 years 12 days ago
A Complete Data Scheduler for Multi-Context Reconfigurable Architectures
: A new technique is presented in this paper to improve the efficiency of data scheduling for multi-context reconfigurable architectures targeting multimedia and DSP applications. ...
Marcos Sanchez-Elez, Milagros Fernández, Ra...
185
Voted
FPL
2009
Springer
152views Hardware» more  FPL 2009»
16 years 2 days ago
Clock gating architectures for FPGA power reduction
Clock gating is a power reduction technique that has been used successfully in the custom ASIC domain. Clock and logic signal power are saved by temporarily disabling the clock si...
Safeen Huda, Muntasir Mallick, Jason H. Anderson
165
Voted
ICCAD
1996
IEEE
85views Hardware» more  ICCAD 1996»
15 years 11 months ago
Exploiting regularity for low-power design
Abstract -- Current day behavioral-synthesis techniques produce architectures that are power-inefficient in the interconnect. Experiments have demonstrated that in synthesized desi...
Renu Mehra, Jan M. Rabaey