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ATS
2005
IEEE
118views Hardware» more  ATS 2005»
16 years 27 days ago
Partial Gating Optimization for Power Reduction During Test Application
Power reduction during test application is important from the viewpoint of chip reliability and for obtaining correct test results. One of the ways to reduce scan test power is to...
Mohammed ElShoukry, Mohammad Tehranipoor, C. P. Ra...
VLSI
2005
Springer
16 years 23 days ago
Pareto Points in SRAM Design Using the Sleepy Stack Approach
Leakage power consumption of current CMOS technology is already a great challenge. ITRS projects that leakage power consumption may come to dominate total chip power consumption a...
Jun-Cheol Park, Vincent John Mooney III
IQIS
2004
ACM
16 years 21 days ago
Utility-based Resolution of Data Inconsistencies
A virtual database system is software that provides unified access to multiple information sources. If the sources are overlapping in their contents and independently maintained,...
Amihai Motro, Philipp Anokhin, Aybar C. Acar
ICS
2003
Tsinghua U.
16 years 15 days ago
Selecting long atomic traces for high coverage
This paper performs a comprehensive investigation of dynamic selection for long atomic traces. It introduces a classification of trace selection methods and discusses existing and...
Roni Rosner, Micha Moffie, Yiannakis Sazeides, Ron...
ICTAI
1997
IEEE
15 years 11 months ago
Toward the Optimization of a Class of Black Box Optimization Algorithms
Many black box optimization algorithms have sufcient exibility to allow them to adapt to the varying circumstances they encounter. These capabilities are of two primary sorts: 1) ...
Gang Wang, Erik D. Goodman, William F. Punch III