This paper discusses the design of a chip using architectural synthesis. The chip, FADIC, is applied in Digital Audio Broadcasting (DAB) receivers. It shows that architectural syn...
tasks to be performed. This Abstract Artifact Model is a description of the form of the artifact(s) without any nt to concrete implementation detail. The Abstract Artifact Model is...
Peter Johnson, Stephanie Wilson, Panos Markopoulos...
This paper presents a novel tool flow combining rewriting logic with hardware synthesis. It enables the automated generation of synthesizable VHDL code from mathematical equations...
In this paper, we propose several deadlock-free protocols for implementing the generalized alternative construct, where a process non-deterministically chooses between sending or ...
Most researchers agree that there is a continuum between well-definedness and ill-definedness. However, positioning a specific problem within this continuum is not always easy. To...