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188
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ICCAD
2001
IEEE
106views Hardware» more  ICCAD 2001»
16 years 4 months ago
A Layout-Aware Synthesis Methodology for RF Circuits
In this paper a layout-aware RF synthesis methodology is presented. The methodology combines the power of a differential evolution algorithm with cost function response modeling a...
Peter J. Vancorenland, Geert Van der Plas, Michiel...
179
Voted
CEC
2008
IEEE
16 years 2 months ago
A fast high quality pseudo random number generator for graphics processing units
—Limited numerical precision of nVidia GeForce 8800 GTX and other GPUs requires careful implementation of PRNGs. The Park-Miller PRNG is programmed using G80’s native Value4f ï...
William B. Langdon
ASYNC
2007
IEEE
146views Hardware» more  ASYNC 2007»
16 years 1 months ago
Notes On Pulse Signaling
This paper reports results of a study on pulse signaling. In pulse signaling, components communicate by means of pulses instead of voltage transitions. The functionality of the co...
Jo C. Ebergen, Steve Furber, Arash Saifhashemi
196
Voted
ACCV
2006
Springer
16 years 1 months ago
An Efficient Real Time Low Bit Rate Video Codec
The implementation of a codec for real time applications such as video-conferencing at low bit rates is discussed. The discrete cosine transform has been used for compression, both...
Shikha Tripathi, R. Vikas, R. C. Jain
146
Voted
DATE
2005
IEEE
103views Hardware» more  DATE 2005»
16 years 1 months ago
Noise Figure Evaluation Using Low Cost BIST
A technique for evaluating noise figure suitable for BIST implementation is described. It is based on a low cost single-bit digitizer, which allows the simultaneous evaluation of ...
Marcelo Negreiros, Luigi Carro, Altamiro Amadeu Su...