161 search results - page 9 / 33 » An Analysis of Delay Based PUF Implementations on FPGA |
172
click to vote
ICPP
1999
IEEE
15 years 11 months ago
1999
IEEE
The implementation of bounded-delay services over integrated services networks relies admission control mechanisms that in turn use end-to-end delay computation algorithms. For gu...
161
click to vote
DDECS
2007
IEEE
16 years 28 days ago
2007
IEEE
– The implementation and the fault simulation technique for the highly reliable digital design using two FPGAs under a processor control is presented. Two FPGAs are used for dupl...
165
click to vote
ISCAS
2007
IEEE
16 years 26 days ago
2007
IEEE
— We propose Differential Power Analysis (DPA) with a phase-based waveform matching technique. Conventionally, a trigger signal and a system clock are used to capture the wavefor...
160
Voted
AHS
2006
IEEE
16 years 19 days ago
2006
IEEE
Domain-specific reconfigurable arrays have shown to provide an efficient trade-off between flexibility of FPGA and performance of ASIC circuit. Nonetheless, the design of these he...
182
click to vote
CCECE
2006
IEEE
16 years 19 days ago
2006
IEEE
Several approaches have been proposed to accelerate the NP-complete Boolean Satisfiability problem (SAT) using reconfigurable computing. We present an FPGA based clause evaluator,...