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LPNMR
2009
Springer
16 years 1 months ago
Application of ASP for Automatic Synthesis of Flexible Multiprocessor Systems from Parallel Programs
Configurable on chip multiprocessor systems combine advantages of task-level parallelism and the flexibility of field-programmable devices to customize architectures for paralle...
Harold Ishebabi, Philipp Mahr, Christophe Bobda, M...
UM
2009
Springer
16 years 1 months ago
Performance Evaluation of a Privacy-Enhancing Framework for Personalized Websites
Abstract. Reconciling personalization with privacy has been a continuing interest in the user modeling community. In prior work, we proposed a dynamic privacy-enhancing user modeli...
Yang Wang 0005, Alfred Kobsa
CODES
2008
IEEE
16 years 1 months ago
Distributed flit-buffer flow control for networks-on-chip
The combination of flit-buffer flow control methods and latency-insensitive protocols is an effective solution for networks-on-chip (NoC). Since they both rely on backpressure...
Nicola Concer, Michele Petracca, Luca P. Carloni
ICCD
2008
IEEE
142views Hardware» more  ICCD 2008»
16 years 1 months ago
Gate planning during placement for gated clock network
Abstract— Clock gating is a popular technique for reducing power dissipation in clock network. Although there have been numerous research efforts on clock gating, the previous ap...
Weixiang Shen, Yici Cai, Xianlong Hong, Jiang Hu
ICRA
2008
IEEE
119views Robotics» more  ICRA 2008»
16 years 1 months ago
Towards schema-based, constructivist robot learning: Validating an evolutionary search algorithm for schema chunking
— In this paper, we lay the groundwork for extending our previously developed ASyMTRe architecture to enable constructivist learning for multi-robot team tasks. The ASyMTRe archi...
Yifan Tang, Lynne E. Parker
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