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DSN
2007
IEEE
16 years 1 months ago
Using Process-Level Redundancy to Exploit Multiple Cores for Transient Fault Tolerance
Transient faults are emerging as a critical concern in the reliability of general-purpose microprocessors. As architectural trends point towards multi-threaded multi-core designs,...
Alex Shye, Tipp Moseley, Vijay Janapa Reddi, Josep...
DSN
2002
IEEE
16 years 6 days ago
Generic Timing Fault Tolerance using a Timely Computing Base
Designing applications with timeliness requirements in environments of uncertain synchrony is known to be a difficult problem. In this paper, we follow the perspective of timing ...
Antonio Casimiro, Paulo Veríssimo
SIS
2008
15 years 8 months ago
Network Access Control Interoperation using Semantic Web Techniques
Network Access Control requirements are typically implemented in practice as a series of heterogeneous security-mechanism-centric policies that span system services and application...
William M. Fitzgerald, Simon N. Foley, Mích...
TJS
2008
95views more  TJS 2008»
15 years 7 months ago
Combating I-O bottleneck using prefetching: model, algorithms, and ramifications
Multiple memory models have been proposed to capture the effects of memory hierarchy culminating in the I-O model of Aggarwal and Vitter [?]. More than a decade of architectural a...
Akshat Verma, Sandeep Sen
ICC
2007
IEEE
140views Communications» more  ICC 2007»
16 years 1 months ago
Performance Analysis of Adaptively-Routed Wormhole-Switched Networks with Finite Buffers
—The use of adaptively-routed wormhole switched k-ary n-cubes has been motivated by the high path diversity provided by the rich topology of this family of interconnection networ...
Nasser Alzeidi, Mohamed Ould-Khaoua, Lewis M. Mack...