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» An Architecture for Developing Context-Aware Systems
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DAC
2009
ACM
16 years 8 months ago
A DVS-based pipelined reconfigurable instruction memory
Energy consumption is of significant concern in battery operated embedded systems. In the processors of such systems, the instruction cache consumes a significant fraction of the ...
Zhiguo Ge, Tulika Mitra, Weng-Fai Wong
DAC
2007
ACM
16 years 8 months ago
Chip Multi-Processor Generator
The drive for low-power, high performance computation coupled with the extremely high design costs for ASIC designs, has driven a number of designers to try to create a flexible, ...
Alex Solomatnikov, Amin Firoozshahian, Wajahat Qad...
DAC
2007
ACM
16 years 8 months ago
Energy-Aware Data Compression for Multi-Level Cell (MLC) Flash Memory
We discover significant value-dependent programming energy variations in multi-level cell (MLC) flash memories, and introduce an energy-aware data compression method that minimize...
Yongsoo Joo, Youngjin Cho, Donghwa Shin, Naehyuck ...
WWW
2006
ACM
16 years 7 months ago
Wake-on-WLAN
In bridging the digital divide, two important criteria are cost-effectiveness, and power optimization. While 802.11 is cost-effective and is being used in several installations in...
Nilesh Mishra, Kameswari Chebrolu, Bhaskaran Raman...
ICCAD
2008
IEEE
140views Hardware» more  ICCAD 2008»
16 years 3 months ago
Correct-by-construction microarchitectural pipelining
— This paper presents a method for correct-by-construction microarchitectural pipelining that handles cyclic systems with dependencies between iterations. Our method combines pre...
Timothy Kam, Michael Kishinevsky, Jordi Cortadella...