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ICCD
2006
IEEE
138views Hardware» more  ICCD 2006»
16 years 4 months ago
Delay and Area Efficient First-level Cache Soft Error Detection and Correction
—Soft error rates are an increasing problem in modern VLSI circuits. Commonly used error correcting codes reduce soft error rates in large memories and second level caches but ar...
Karl Mohr, Lawrence Clark
ICCD
2003
IEEE
140views Hardware» more  ICCD 2003»
16 years 4 months ago
Cost-Efficient Memory Architecture Design of NAND Flash Memory Embedded Systems
NAND flash memory has become an indispensable component in embedded systems because of its versatile features such as non-volatility, solid-state reliability, low cos,t and high d...
Chanik Park, Jaeyu Seo, Dongyoung Seo, Shinhan Kim...
AINA
2005
IEEE
16 years 22 days ago
CAM-Based Huffman Decoding Made Power Efficient
Ternary content addressable (TCAM) is favorable for high-speed search due to its parallel architecture and ability for searching arbitrary-length keys. However, the usage of TCAM ...
Pi-Chung Wang, Chun-Liang Lee, Yuan-Rung Yang, Hun...
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ICDCSW
2002
IEEE
16 years 1 days ago
Efficient Massive Sharing of Content among Peers
In this paper we focus on the design of high performance peer-to-peer content sharing systems. In particular, our goal is to achieve global load balancing and short user-request r...
Peter Triantafillou, Chryssani Xiruhaki, Manolis K...
3DOR
2008
15 years 9 months ago
3D Object Retrieval using an Efficient and Compact Hybrid Shape Descriptor
We present a novel 3D object retrieval method that relies upon a hybrid descriptor which is composed of 2D features based on depth buffers and 3D features based on spherical harmo...
Panagiotis Papadakis, Ioannis Pratikakis, Theohari...