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ICS
2003
Tsinghua U.
16 years 6 days ago
AEGIS: architecture for tamper-evident and tamper-resistant processing
We describe the architecture for a single-chip aegis processor which can be used to build computing systems secure against both physical and software attacks. Our architecture ass...
G. Edward Suh, Dwaine E. Clarke, Blaise Gassend, M...
187
Voted
CGO
2010
IEEE
16 years 3 days ago
Taming hardware event samples for FDO compilation
Feedback-directed optimization (FDO) is effective in improving application runtime performance, but has not been widely adopted due to the tedious dual-compilation model, the dif...
Dehao Chen, Neil Vachharajani, Robert Hundt, Shih-...
ISCA
2010
IEEE
240views Hardware» more  ISCA 2010»
16 years 2 days ago
Modeling critical sections in Amdahl's law and its implications for multicore design
This paper presents a fundamental law for parallel performance: it shows that parallel performance is not only limited by sequential code (as suggested by Amdahl’s law) but is a...
Stijn Eyerman, Lieven Eeckhout
170
Voted
CF
2010
ACM
16 years 2 days ago
EXACT: explicit dynamic-branch prediction with active updates
Branches that depend directly or indirectly on load instructions are a leading cause of mispredictions by state-of-the-art branch predictors. For a branch of this type, there is a...
Muawya Al-Otoom, Elliott Forbes, Eric Rotenberg
ECCV
2010
Springer
15 years 12 months ago
Detecting ground shadows in outdoor consumer photographs
Detecting shadows from images can significantly improve the performance of several vision tasks such as object detection and tracking. Recent approaches have mainly used illuminat...
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