Sciweavers

5105 search results - page 627 / 1021
» An algorithm to determine peer-reviewers
Sort
View
SIGCOMM
1999
ACM
16 years 18 hour ago
On Estimating End-to-End Network Path Properties
The more information about current network conditions available to a transport protocol, the more efficiently it can use the network to transfer its data. In networks such as the...
Mark Allman, Vern Paxson
MICRO
1999
IEEE
110views Hardware» more  MICRO 1999»
15 years 12 months ago
Balance Scheduling: Weighting Branch Tradeoffs in Superblocks
Since there is generally insufficient instruction level parallelism within a single basic block, higher performance is achieved by speculatively scheduling operations in superbloc...
Alexandre E. Eichenberger, Waleed Meleis
RSP
1999
IEEE
128views Control Systems» more  RSP 1999»
15 years 12 months ago
3-D Floorplanning: Simulated Annealing and Greedy Placement Methods for Reconfigurable Computing Systems
The advances in the programmable hardware has lead to new architectures where the hardware can be dynamically adapted to the application to gain better performance. There are stil...
Kia Bazargan, Ryan Kastner, Majid Sarrafzadeh
FPL
1999
Springer
147views Hardware» more  FPL 1999»
15 years 12 months ago
Synthia: Synthesis of Interacting Automata Targeting LUT-based FPGAs
This paper details the development, implementation, and results of Synthia, a system for the synthesis of Finite State Machines (FSMs) to field-programmable logic. Our approach us...
George A. Constantinides, Peter Y. K. Cheung, Wayn...
IFIP
1999
Springer
15 years 12 months ago
Frontier: A Fast Placement System for FPGAs
In this paper we describe Frontier, an FPGA placement system that uses design macro-blocks in conjuction with a series of placement algorithms to achieve highly-routable and high-...
Russell Tessier