149 search results - page 26 / 30 » An approach for implementing efficient superscalar CISC proc... |
166
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IEEEPACT
2002
IEEE
15 years 11 months ago
2002
IEEE
Java exception checks are designed to ensure that any faulting instruction causing a hardware exception does not terminate the program abnormally. These checks, however, impose so...
184
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ACSC
2004
IEEE
15 years 10 months ago
2004
IEEE
When modern processors keep increasing the instruction window size and the issue width to exploit more instruction-level parallelism (ILP), the demand of larger physical register ...
192
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PC
2006
15 years 6 months ago
2006
Tiling is a well known loop transformation used to reduce communication overhead in distributed memory machines. Although a lot of theoretical research has been done concerning th...
196
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SAC
2006
ACM
15 years 6 months ago
2006
ACM
Many combinatorial optimization problems in biosequence analysis are solved via dynamic programming. To increase programming productivity and program reliability, a domain specifi...
191
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Publication
Continuing improvements in CPU and GPU performances as well as increasing multi-core processor and cluster-based parallelism demand for flexible and scalable parallel rendering sol...