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FCCM
2006
IEEE
101views VLSI» more  FCCM 2006»
16 years 1 months ago
A Type Architecture for Hybrid Micro-Parallel Computers
Recently, platform FPGAs that integrate sequential processors with a spatial fabric have become prevalent. While these hybrid architectures ease the burden of integrating sequenti...
Benjamin Ylvisaker, Brian Van Essen, Carl Ebeling
APCCM
2008
15 years 8 months ago
Modelling Inter-Process Dependencies with High-Level Business Process Modelling Languages
The work presented in this paper targets the software integration on the level of business process models. The goal is to create the behavioural description of an integrated syste...
Georg Grossmann, Michael Schrefl, Markus Stumptner
AIPS
2007
15 years 9 months ago
itSIMPLE 2.0: An Integrated Tool for Designing Planning Domains
A great effort has been made today in the area of Artificial Intelligence for defining reliable automated planning systems that can be applied in real life applications. That le...
Tiago Stegun Vaquero, Victor Romero, Flavio Tonida...
WSC
2004
15 years 8 months ago
Implementing the High Level Architecture in the Virtual Test Bed
The Virtual Test Bed (VTB) is a prototype of a virtual engineering environment to study operations of current and future space vehicles, spaceports, and ranges. The HighLevel Arch...
José A. Sepúlveda, Luis C. Rabelo, J...
GLVLSI
2010
IEEE
212views VLSI» more  GLVLSI 2010»
16 years 8 days ago
An integrated thermal estimation framework for industrial embedded platforms
Next generation industrial embedded platforms require the development of complex power and thermal management solutions. Indeed, an increasingly fine and intrusive thermal contro...
Andrea Acquaviva, Andrea Calimera, Alberto Macii, ...