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DATE
2006
IEEE
110views Hardware» more  DATE 2006»
16 years 21 days ago
Configurable multiprocessor platform with RTOS for distributed execution of UML 2.0 designed applications
This paper presents the design and full prototype implementation of a configurable multiprocessor platform that supports distributed execution of applications described in UML 2.0...
Tero Arpinen, Petri Kukkala, Erno Salminen, Marko ...
GLOBECOM
2006
IEEE
16 years 21 days ago
AR-PIN/PDC: Flexible Advance Reservation of Intradomain and Interdomain Lightpaths
— A collection of Grid computing resources interconnected by an application-configurable network of lightpaths is called a LambdaGrid. It provides data-intensive applications wit...
Eric He, Xi Wang, Venkatram Vishwanath, Jason Leig...
MICRO
2006
IEEE
155views Hardware» more  MICRO 2006»
16 years 20 days ago
In-Network Cache Coherence
With the trend towards increasing number of processor cores in future chip architectures, scalable directory-based protocols for maintaining cache coherence will be needed. Howeve...
Noel Eisley, Li-Shiuan Peh, Li Shang
DATE
2005
IEEE
107views Hardware» more  DATE 2005»
16 years 8 days ago
Exploring NoC Mapping Strategies: An Energy and Timing Aware Technique
Complex applications implemented as Systems on Chip (SoCs) demand extensive use of system level modeling and validation. Their implementation gathers a large number of complex IP ...
César A. M. Marcon, Ney Laert Vilar Calazan...
EUROPAR
2001
Springer
15 years 11 months ago
VIA Communication Performance on a Gigabit Ethernet Cluster
As the technology for high-speed networks has evolved over the last decade, the interconnection of commodity computers (e.g., PCs and workstations) at gigabit rates has become a re...
Mark Baker, Paul A. Farrell, Hong Ong, Stephen L. ...