208 search results - page 32 / 42 » Analog circuits optimization based on evolutionary computati... |
182
Voted
VLSID
2002
IEEE
16 years 6 months ago
2002
IEEE
IDDQ testing has been used as a test technique to supplement voltage testing of CMOS chips. The idea behind IDDQ testing is to declare a chip as faulty if the steady-state current...
196
Voted
IACR
2011
14 years 6 months ago
2011
We present a radically new approach to fully homomorphic encryption (FHE) that dramatically improves performance and bases security on weaker assumptions. A central conceptual con...
182
Voted
GECCO
2006
Springer
15 years 10 months ago
2006
Springer
This paper presents a methodology for using heuristic search methods to optimise cancer chemotherapy. Specifically, two evolutionary algorithms - Population Based Incremental Lear...
128
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DAC
2005
ACM
16 years 7 months ago
2005
ACM
MiniBit, our automated approach for optimizing bit-widths of fixed-point designs is based on static analysis via affine arithmetic. We describe methods to minimize both the intege...
163
Voted
VLSID
2009
IEEE
16 years 7 months ago
2009
IEEE
We present the automatic test pattern generator TIGUAN based on a thread-parallel SAT solver. Due to a tight integration of the SAT engine into the ATPG algorithm and a carefully ...