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ICCAD
2006
IEEE
131views Hardware» more  ICCAD 2006»
16 years 4 months ago
High-level synthesis challenges and solutions for a dynamically reconfigurable processor
A dynamically reconfigurable processor (DRP) is designed to achieve high area efficiency by switching reconfigurable data paths dynamically. Our DRP architecture has a stand alone...
Takao Toi, Noritsugu Nakamura, Yoshinosuke Kato, T...
DEXA
2009
Springer
127views Database» more  DEXA 2009»
16 years 2 months ago
The Real Performance Drivers behind XML Lock Protocols
Abstract. Fine-grained lock protocols should allow for highly concurrent transaction processing on XML document trees, which is addressed by the taDOM lock protocol family enabling...
Sebastian Bächle, Theo Härder
ICMCS
2007
IEEE
164views Multimedia» more  ICMCS 2007»
16 years 1 months ago
Medical Visual Information Retrieval: State of the Art and Challenges Ahead
Today’s medical institutions produce enormous amounts of data on patients, including multimedia data, which is increasingly produced in digital form. These data in their clinica...
Henning Müller, Xin Zhou, Adrien Depeursinge,...
ISCA
2006
IEEE
148views Hardware» more  ISCA 2006»
16 years 1 months ago
Tolerating Dependences Between Large Speculative Threads Via Sub-Threads
Thread-level speculation (TLS) has proven to be a promising method of extracting parallelism from both integer and scientific workloads, targeting speculative threads that range ...
Christopher B. Colohan, Anastassia Ailamaki, J. Gr...
3DGIS
2006
Springer
16 years 1 months ago
Reconstruction of Complex Buildings using LIDAR and 2D Maps
The extraction of the building models from remote-sensed data is an important work in the geographic information systems. This investigation describes an approach to integrate LIDA...
Tee-Ann Teo, Jiann-Yeou Rau, Liang-Chien Chen, Jin...
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