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» Application of Reduce Order Modeling to Time Parallelization
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GLVLSI
2003
IEEE
153views VLSI» more  GLVLSI 2003»
16 years 15 days ago
FORCE: a fast and easy-to-implement variable-ordering heuristic
The MINCE heuristic for variable-ordering [1] successfully reduces the size of BDDs and can accelerate SAT-solving. Applications to reachability analysis have also been successful...
Fadi A. Aloul, Igor L. Markov, Karem A. Sakallah
WOSP
2010
ACM
16 years 2 months ago
A page fault equation for dynamic heap sizing
For garbage-collected applications, dynamically-allocated objects are contained in a heap. Programmer productivity improves significantly if there is a garbage collector to autom...
Y. C. Tay, X. R. Zong
ICCAD
2006
IEEE
152views Hardware» more  ICCAD 2006»
16 years 4 months ago
Fast and robust quadratic placement combined with an exact linear net model
— This paper presents a robust quadratic placement approach, which offers both high-quality placements and excellent computational efficiency. The additional force which distrib...
Peter Spindler, Frank M. Johannes
FCCM
2002
IEEE
127views VLSI» more  FCCM 2002»
16 years 5 days ago
Hardware-Assisted Fast Routing
To fully realize the benefits of partial and rapid reconfiguration of field-programmable devices, we often need to dynamically schedule computing tasks and generate instance-sp...
André DeHon, Randy Huang, John Wawrzynek
IJCNN
2006
IEEE
16 years 1 months ago
Improved Snake Model for Fast Image Segmentation
—This paper presents an Improved Snake Model (ISM) effective for performing fast image segmentation. The work takes advantage of two well-known snake models of Balloon [1] and GG...
Chi-Cheng Ting, Jhan-Syuan Yu, Jiun-Shuen Tzeng, J...