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CC
2005
Springer
108views System Software» more  CC 2005»
16 years 6 days ago
Task Partitioning for Multi-core Network Processors
Abstract. Network processors (NPs) typically contain multiple concurrent processing cores. State-of-the-art programming techniques for NPs are invariably low-level, requiring progr...
Robert Ennals, Richard Sharp, Alan Mycroft
ICPPW
2006
IEEE
16 years 21 days ago
Retargeting Image-Processing Algorithms to Varying Processor Grain Sizes
Embedded computing architectures can be designed to meet a variety of application specific requirements. However, optimized hardware can require compiler support to realize the po...
Sam Sander, Linda M. Wills
LCTRTS
2010
Springer
16 years 1 months ago
Analysis and approximation for bank selection instruction minimization on partitioned memory architecture
A large number of embedded systems include 8-bit microcontrollers for their energy efficiency and low cost. Multi-bank memory architecture is commonly applied in 8-bit microcontr...
Minming Li, Chun Jason Xue, Tiantian Liu, Yingchao...
CCGRID
2006
IEEE
16 years 22 days ago
Integrating the HLA RTI Services with Scilab
This paper describes the integration of the High Level Architecture (HLA), an IEEE standard for distributed interactive simulation, with a scientific software package (Scilab) and...
Thitima Theppaya, Pichaya Tandayya, Chatchai Janta...
CF
2011
ACM
14 years 6 months ago
SIFT: a low-overhead dynamic information flow tracking architecture for SMT processors
Dynamic Information Flow Tracking (DIFT) is a powerful technique that can protect unmodified binaries from a broad range of vulnerabilities such as buffer overflow and code inj...
Meltem Ozsoy, Dmitry Ponomarev, Nael B. Abu-Ghazal...