Sciweavers

23406 search results - page 4609 / 4682
» Architecture, Design, Implementation
Sort
View
ASAP
2004
IEEE
101views Hardware» more  ASAP 2004»
15 years 10 months ago
Register Organization for Enhanced On-Chip Parallelism
Large register file with multiple ports is a critical component of a high-performance processor. A large number of registers are necessary for processing a larger number of in-fli...
Rama Sangireddy
154
Voted
AUIC
2004
IEEE
15 years 10 months ago
Rapid Visual Flow: How Fast Is Too Fast?
It is becoming increasingly common for user interfaces to use zooming visual effects that automatically adapt to user actions. The MacOs X `dock' icon panel, for instance, us...
Andrew Wallace, Joshua Savage, Andy Cockburn
175
Voted
ATAL
2006
Springer
15 years 10 months ago
Multiply-constrained distributed constraint optimization
Distributed constraint optimization (DCOP) has emerged as a useful technique for multiagent coordination. While previous DCOP work focuses on optimizing a single team objective, i...
Emma Bowring, Milind Tambe, Makoto Yokoo
ATAL
2006
Springer
15 years 10 months ago
A utility-based sensing and communication model for a glacial sensor network
This paper reports on the development of a utility-based mechanism for managing sensing and communication in cooperative multi-sensor networks. The specific application considered...
Paritosh Padhy, Rajdeep K. Dash, Kirk Martinez, Ni...
CPAIOR
2004
Springer
15 years 10 months ago
Building Models through Formal Specification
Abstract. Over the past years, a number of increasingly expressive languages for modelling constraint and optimisation problems have evolved. In developing a strategy to ease the c...
Gerrit Renker, Hatem Ahriz
« Prev « First page 4609 / 4682 Last » Next »