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CODES
2004
IEEE
15 years 11 months ago
Power analysis of system-level on-chip communication architectures
For complex System-on-chips (SoCs) fabricated in nanometer technologies, the system-level on-chip communication architecture is emerging as a significant source of power consumpti...
Kanishka Lahiri, Anand Raghunathan
201
Voted
FCCM
1995
IEEE
135views VLSI» more  FCCM 1995»
15 years 10 months ago
Architectural descriptions for FPGA circuits
FPGA-based synthesis tools require information about behaviour and architectural to make effective use of the limited number of cells typically available. A hardware description l...
Satnam Singh
165
Voted
ERSA
2006
114views Hardware» more  ERSA 2006»
15 years 8 months ago
Architectural Support for Runtime 2D Partial Reconfiguration
: Traditional FPGA architectures can potentially allow the dynamic swap in and out of hardware tasks through 2D partial reconfiguration. A segmented bus structure is proposed to be...
Fei Wang, Jack S. N. Jean
167
Voted
FLAIRS
2006
15 years 8 months ago
Demystify the Messages in the Hugin Architecture for Probabilistic Inference and Its Application
In this paper, we investigate the semantic meaning of the messages passed in the Hugin architecture for probabilistic inference. By utilizing this information, one can avoid passi...
Dan Wu, Karen H. Jin
FLAIRS
2003
15 years 8 months ago
An Action Selection Architecture for an Emotional Agent
An architecture for action selection is presented linking emotion, cognition and behavior. It defines the information and emotion processes of an agent. The architecture has been...
Gertjan J. Burghouts, Dirk Heylen, Mannes Poel, Ri...