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APCSAC
2003
IEEE
15 years 11 months ago
Simultaneous MultiStreaming for Complexity-Effective VLIW Architectures
Very Long Instruction Word (VLIW) architectures exploit instruction level parallelism (ILP) with the help of the compiler to achieve higher instruction throughput with minimal hard...
Pradeep Rao, S. K. Nandy, M. N. V. Satya Kiran
WOSP
2010
ACM
15 years 7 months ago
Automatically improve software architecture models for performance, reliability, and cost using evolutionary algorithms
Quantitative prediction of quality properties (i.e. extrafunctional properties such as performance, reliability, and cost) of software architectures during design supports a syste...
Anne Martens, Heiko Koziolek, Steffen Becker, Ralf...
ICSR
2011
Springer
14 years 10 months ago
Improving Product Line Architecture Design and Customization by Raising the Level of Variability Modeling
Product Line Architecture (PLA) plays a central role in software product line development. In order to support architecture-level variability modeling, most architecture descriptio...
Jiayi Zhu, Xin Peng, Stan Jarzabek, Zhenchang Xing...
DAC
2008
ACM
16 years 8 months ago
Automated transistor sizing for FPGA architecture exploration
The creation of an FPGA requires extensive transistor-level design. This is necessary for both the final design, and during architecture exploration, when many different logic and...
Ian Kuon, Jonathan Rose
DAC
2007
ACM
16 years 8 months ago
SOC Test Architecture Optimization for Signal Integrity Faults on Core-External Interconnects
The test time for core-external interconnect shorts/opens is typically much less than that for core-internal logic. Therefore, prior work on test infrastructure design for core-ba...
Qiang Xu, Yubin Zhang, Krishnendu Chakrabarty