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ICCD
2001
IEEE
90views Hardware» more  ICCD 2001»
16 years 4 months ago
Interconnect-centric Array Architectures for Minimum SRAM Access Time
‡ Physical and generic models that analytically couple the array architecture of CMOS SRAMs with the wire lengths and fan-outs along critical paths to decode and sense data are r...
Azeez J. Bhavnagarwala, Stephen V. Kosonocky, Jame...
APSCC
2008
IEEE
16 years 1 months ago
Ontology-Supported Portal Architecture for Scholar's Webpages
This paper proposed an ontology-supported portal architecture: OntoPortal, which can integrate both internal components ontology-supported crawler and classifier to concern both m...
Sheng-Yuan Yang, Chun-Liang Hsu
DATE
2008
IEEE
121views Hardware» more  DATE 2008»
16 years 1 months ago
Quantitative Evaluation in Embedded System Design: Validation of Multiprocessor Multithreaded Architectures
As levels of parallelism are becoming increasingly complex in multiprocessor architectures, GALS, and asynchronous circuits, methodologies and software tools are needed to verify ...
Nicolas Coste, Hubert Garavel, Holger Hermanns, Ri...
KES
2007
Springer
16 years 1 months ago
Hybrid Agents Based Architecture on Automated Dynamic Environments
Abstract. This paper presents a hybrid agents based architecture that uses casebased reasoning and case-based planning systems as reasoning mechanism in deliberative BDI agents to ...
Dante I. Tapia, Javier Bajo, Juan M. Corchado, Sar...
KES
2007
Springer
16 years 1 months ago
Hybrid Architecture for a Reasoning Planner Agent
Abstract. This paper presents a hybrid architecture that facilitates the incurporation of a case-based planning system as the reasoning motor for a deliberative agent. This archite...
Javier Bajo, Dante I. Tapia, Ana de Luis, Sara Rod...