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VR
2009
IEEE
136views Virtual Reality» more  VR 2009»
16 years 2 months ago
An Image-Warping Architecture for VR: Low Latency versus Image Quality
Designing low end-to-end latency system architectures for virtual reality is still an open and challenging problem. We describe the design, implementation and evaluation of a clie...
Ferdi A. Smit, Robert van Liere, Stephan Beck, Ber...
QSHINE
2009
IEEE
16 years 2 months ago
Revisiting a QoE Assessment Architecture Six Years Later: Lessons Learned and Remaining Challenges
In 2003, we presented an architecture for a streaming video quality assessment system [1]. Six years later, many of the challenges outlined in that paper remain. This paper revisit...
Amy Csizmar Dalal
ICPP
2009
IEEE
16 years 1 months ago
Mapping the FDTD Application to Many-Core Chip Architectures
—This paper reports a study of mapping the Finite Difference Time Domain (FDTD) application to the IBM Cyclops64 (C64) many-core chip architecture [1]. C64 is chosen for this stu...
Daniel Orozco, Guang R. Gao
CNSR
2008
IEEE
16 years 1 months ago
MPA: A Network-Centric Architecture for Micro-Mobility Support in IP and MPLS Networks
Micro-mobility protocols aim to improve localized mobility by reducing the handover overheads. In this paper we present the Mobility Plane Architecture (MPA). This architecture wa...
Eduardo Zagari, Rodrigo Prado, Eleri Cardozo, Maur...
DATE
2008
IEEE
106views Hardware» more  DATE 2008»
16 years 1 months ago
Low Power Illinois Scan Architecture for Simultaneous Power and Test Data Volume Reduction
We present Low Power Illinois scan architecture (LPILS) to achieve power dissipation and test data volume reduction, simultaneously. By using the proposed scan architecture, dynam...
Anshuman Chandra, Felix Ng, Rohit Kapur