23436 search results - page 288 / 4688 » Architecture |
253
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HPCN
2000
Springer
15 years 11 months ago
2000
Springer
We build an analytical model for an application utilizing master-slave paradigm. In the model, only three architecture parameters are used: latency, bandwidth and flop rate. Instea...
145
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ASPDAC
1995
ACM
15 years 11 months ago
1995
ACM
- Due to efficient interconnect structure and internal parallelism bus-partitioned architectures are very beneficial for sub-micron chip design. This paper presents a new approach ...
164
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TPHOL
2000
IEEE
15 years 11 months ago
2000
IEEE
This paper outlines a formal model of the Intel IA-64 architecture, and explains how this model can be used to verify the correctness of assembly-level code optimizations. The form...
174
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ESANN
2008
15 years 9 months ago
2008
In this paper, we consider the problem of implementation of neural network in the context of the level 2 trigger of HESS2 project. We propose a hardware architecture which which ta...
146
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WICSA
2008
15 years 8 months ago
2008
"The life of a software architect is a long and rapid succession of suboptimal design decisions taken partly in the dark." [1] The purpose of this paper is to shed some ...