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DATE
2008
IEEE
158views Hardware» more  DATE 2008»
16 years 2 months ago
Performance Analysis of SoC Architectures Based on Latency-Rate Servers
This paper presents a method for static performance analysis of SoC architectures. The method is based on a network calculus theory known as LR servers. This network calculus is e...
Jelte Peter Vink, Kees van Berkel, Pieter van der ...
DSD
2008
IEEE
136views Hardware» more  DSD 2008»
16 years 2 months ago
Flexible Baseband Architectures for Future Wireless Systems
— The mobile communication systems today, have different radio spectrum, radio access technologies, and protocol stacks depending on the network being utilized. This gives rise t...
Najam-ul-Islam Muhammad, Rizwan Rasheed, Renaud Pa...
ECBS
2008
IEEE
106views Hardware» more  ECBS 2008»
16 years 2 months ago
AMABULO - A Model Architecture for Business Logic
Models are widely used for communication and documentation purposes. They also tend to be used as parameters for code generation. Because these models have to be complete, consist...
Tobias Brückmann, Volker Gruhn
ICPADS
2008
IEEE
16 years 2 months ago
Quarc: A Novel Network-On-Chip Architecture
This paper introduces the Quarc NoC, a novel NoC architecture inspired by the Spidergon NoC [16]. The Quarc scheme significantly outperforms the Spidergon NoC through balancing t...
Mahmoud Moadeli, Wim Vanderbauwhede, Ali Shahrabi
ISCAS
2008
IEEE
109views Hardware» more  ISCAS 2008»
16 years 1 months ago
A low-area interconnect architecture for chip multiprocessors
— A new inter-processor communication architecture for chip multiprocessors is proposed which has a low area cost and flexible routing capability. To achieve a low area cost, th...
Zhiyi Yu, Bevan M. Baas