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GLVLSI
2003
IEEE
239views VLSI» more  GLVLSI 2003»
16 years 25 days ago
A novel 32-bit scalable multiplier architecture
In this paper, we present a novel hybrid multiplier architecture that has the regularity of linear array multipliers and the performance of tree multipliers and is highly scalable...
Yeshwant Kolla, Yong-Bin Kim, John Carter
HICSS
2003
IEEE
124views Biometrics» more  HICSS 2003»
16 years 25 days ago
Architecture of a Mobile Internet
In this paper, we outline the next major evolution of the Internet architecture, where support for mobility is not the exception but the typical case. We show which parts of the I...
Dick Schefström
ICCD
2003
IEEE
113views Hardware» more  ICCD 2003»
16 years 25 days ago
Multiple Transition Model and Enhanced Boundary Scan Architecture to Test Interconnects for Signal Integrity
As the technology is shrinking toward 50 nm and the working frequency is going into multi gigahertz range, the effect of interconnects on functionality and performance of system-o...
Mohammad H. Tehranipour, Nisar Ahmed, Mehrdad Nour...
ISWC
2003
IEEE
16 years 25 days ago
MIThril 2003: Applications and Architecture
In this paper we describe the MIThril 2003 wearable computing research platform. MIThril 2003 is a proven, accessible architecture that combines inexpensive, commodity hardware, a...
Richard W. DeVaul, Michael Sung, Jonathan Gips, Al...
ITC
2003
IEEE
170views Hardware» more  ITC 2003»
16 years 25 days ago
Double-Tree Scan: A Novel Low-Power Scan-Path Architecture
In a scan-based system with a large number of flip-flops, a major component of power is consumed during scanshift and clocking operation in test mode. In this paper, a novel scan-...
Bhargab B. Bhattacharya, Sharad C. Seth, Sheng Zha...